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andy25's avatar
andy25
Icon for Occasional Contributor rankOccasional Contributor
2 years ago
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Nios V, Max10, N25Q512A QSPI, XIP

Hello all.

I have this Max10 Dev Kit, it has 512Mbit N25Q512A QSPI flash.

I have a Nios V/m processor, and if I execute out of on-chip memory everything works fine.

I'd like to try Execute in place (XIP).

In Platform Designer I'm using the "Generic Serial Flash Interface Intel FPGA IP" component.

In the Nios V/m I have my reset vector pointing to "external_flash.avl_mem", offset is zero.

In the bsp-editor my .reset and .text are pointed at external_flash.

I convert app.elf to app.hex with:

elf2flash --input=app.elf --output=flash.srec --reset=0 --base=0 --end=0x3ffffff
riscv32-unknown-elf-objcopy --input-target srec --output-target ihex flash.srec app.hex

Then I use "Convert Programming File" to convert app.hex to app.pof (using device CFI_512Mb). app.pof only contains the app.hex, I remove the "SOF Data" page, and Add Hex Data.

I use the "Parallel Flash Loader ii" to write app.pof to QSPI_Flash.

Then I reflash the Max10 with my nios.pof, but nothing runs.

Is this supported? Am I doing something wrong?

Thanks for your time.

  • Have you tried changing the addressing mode to 4 byte addressing? The default is 3-byte and is configured through the Control Register (0x0) of the IP. It could be that the 512mb memory requires more than 3-bytes to access.

9 Replies

  • Hi,

    Greetings and welcome to Intel's forum.

    Please give me some time to check on this issue and will get back to you with the update.

    Thank you.

    Regards,

    Fathulnaim


    • andy25's avatar
      andy25
      Icon for Occasional Contributor rankOccasional Contributor

      Yes, I did set my NiosV reset vector to QSPI Flash.

      Thanks for the link, I think I've seen it, but I shall review it again just to make sure.

      -Andy

      • andy25's avatar
        andy25
        Icon for Occasional Contributor rankOccasional Contributor

        Ah yes, now I remember, I did follow that link, and most of it applies, except for the .jic creation. I am only putting my app.hex in flash (not my fpga bitstream), and .jic didnt seem to have any support for Max10 or my N25Q512A device.

        So I tried to create a .pof instead, which is not covered in the documentation.

        -Andy

  • aghoras's avatar
    aghoras
    Icon for New Contributor rankNew Contributor

    Is execute in place supported for NIOS V on the Max 10?

    • FvM's avatar
      FvM
      Icon for Super Contributor rankSuper Contributor
      Yes, supported for all control-block based devices, e.g. MAX10 according to Processor Design Manual.
  • aghoras's avatar
    aghoras
    Icon for New Contributor rankNew Contributor

    Have you tried changing the addressing mode to 4 byte addressing? The default is 3-byte and is configured through the Control Register (0x0) of the IP. It could be that the 512mb memory requires more than 3-bytes to access.

    • andy25's avatar
      andy25
      Icon for Occasional Contributor rankOccasional Contributor

      Yay! That works!

      Reading the N25Q manual I could have sworn the default would be 3-byte addressing.

      I have Feature Digit 8 which notes: "Enter 4-byte address mode and exit 4-byte address mode supported."

      Feature Digit 7 (which I don't have) notes: "4-byte addressing mode is the default at power-up"

      Oh well, it works now.

      Thanks for the help!

      -Andy

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