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Balerion's avatar
Balerion
Icon for Occasional Contributor rankOccasional Contributor
1 year ago
Solved

Nios-V .elf download failure

Hi all, I am trying to download two simple Nios-V apps using RiscFree IDE to my target boards. One of my board has Cyclone-V and the other has Arria-10. My main.cpp files are same but their BSPs are...
Nios Cpu
  • BoonkhaiN_Altera's avatar
    BoonkhaiN_Altera
    11 months ago

    Hi Balerion,

    When you are able to download the elf using the --go command, it is likely that your setup on the board is correct already

    There is an update by the way. I tried the command

    *****************************************************************
    "niosv-download.exe app.elf --go"

    -> Hello Nios V World!

    *****************************************************************

    And you saw this error when trying to connect with RiscFree

    Initializing connection ...
    Cannot set the JTAG frequency, continuing with auto adjust mode
    Connected to target device with IDCODE 0x2e240dd using USB-Blaster-2 (1) via JTAG at 24.00MHz.
    Info : Active Harts Detected : 1
    Info : Core[0] Hart[0] is in halted state
    Info : [0] System architecture : RV32
    Info : [0] Number of hardware breakpoints available : 1
    Info : [0] Number of program buffers: 8
    Info : [0] Number of data registers: 2
    Info : [0] Memory access -> Program buffer
    Info : [0] Memory access -> Abstract access memory
    Info : [0] CSR & FP Register access -> Abstract commands

    Waiting for debugger connection on port 56767.
    Press 'Q' to Quit.

    This could be your RiscFree's setting or your host system's setting not set correctly.

    Likely Root Causes
    GDB Server launched by risc free failes to connect IDE cannot detect the prompt (gdb) migh due to the following

    a) Firewall/antivrus is blocking the local host port access

    b) IDE times out before connection is established

    c) There is a mismatch in how the debug config launches

    Possible Fix

    a) Temporarily disable antivirus / firewall

    b) Try launch RiscFree as administrator

    c) Increase debugger timeout (if IDE allows)

    Please let me know the result after you try the step and provide screenshot if possible.

    Regards,

    Boon Khai

BoonkhaiN_Altera's avatar
BoonkhaiN_Altera
Icon for Occasional Contributor rankOccasional Contributor
11 months ago

Hi Balerion,

Thanks for confirming the steps, when you enable the checkbox "Enable Reset From Debug Module" you actually allowing the debug module inside the NIos V processor to assert a soft reset signal to the CPU core during the debugging via JTAG.

This reset is controlled internally by the RISC V Debug specification and triggered automatically by the debugger when you perform the steps like halting the CPU, download elf, restart the CPU (--go) or reset the cpu into the known state.

I think that's why initially when the checkbox is not enabled, you get error like (no hart found) because the core stuck in reset from an external logic or maybe in an illegal instruction set or spinning in tight loops with no debug halt support.


In short the setting that you choose is correct in order to perform this debugging steps.

Regards,

Boon Khai

  • Balerion's avatar
    Balerion
    Icon for Occasional Contributor rankOccasional Contributor
    11 months ago

    Hi,

    Yes, that checkbox solve the hart issue. But I can download and execute only through CLI. I am still not be able to use RiscFree IDE. I couldn't solve that problem. Do you have any idea about where it is? Is there any information that may help us to solve this problem?

    Thanks,

    Balerion