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Balerion's avatar
Balerion
Icon for Occasional Contributor rankOccasional Contributor
1 year ago
Solved

Nios-V .elf download failure

Hi all, I am trying to download two simple Nios-V apps using RiscFree IDE to my target boards. One of my board has Cyclone-V and the other has Arria-10. My main.cpp files are same but their BSPs are...
Nios Cpu
  • BoonkhaiN_Altera's avatar
    BoonkhaiN_Altera
    11 months ago

    Hi Balerion,

    When you are able to download the elf using the --go command, it is likely that your setup on the board is correct already

    There is an update by the way. I tried the command

    *****************************************************************
    "niosv-download.exe app.elf --go"

    -> Hello Nios V World!

    *****************************************************************

    And you saw this error when trying to connect with RiscFree

    Initializing connection ...
    Cannot set the JTAG frequency, continuing with auto adjust mode
    Connected to target device with IDCODE 0x2e240dd using USB-Blaster-2 (1) via JTAG at 24.00MHz.
    Info : Active Harts Detected : 1
    Info : Core[0] Hart[0] is in halted state
    Info : [0] System architecture : RV32
    Info : [0] Number of hardware breakpoints available : 1
    Info : [0] Number of program buffers: 8
    Info : [0] Number of data registers: 2
    Info : [0] Memory access -> Program buffer
    Info : [0] Memory access -> Abstract access memory
    Info : [0] CSR & FP Register access -> Abstract commands

    Waiting for debugger connection on port 56767.
    Press 'Q' to Quit.

    This could be your RiscFree's setting or your host system's setting not set correctly.

    Likely Root Causes
    GDB Server launched by risc free failes to connect IDE cannot detect the prompt (gdb) migh due to the following

    a) Firewall/antivrus is blocking the local host port access

    b) IDE times out before connection is established

    c) There is a mismatch in how the debug config launches

    Possible Fix

    a) Temporarily disable antivirus / firewall

    b) Try launch RiscFree as administrator

    c) Increase debugger timeout (if IDE allows)

    Please let me know the result after you try the step and provide screenshot if possible.

    Regards,

    Boon Khai

BoonkhaiN_Altera's avatar
BoonkhaiN_Altera
Icon for Occasional Contributor rankOccasional Contributor
1 year ago

I see, so you are connecting to the board through jtagserver.

Is your device consist of HPS? or it is just FPGA.

And also you were saying that you able to

1) download .sof through Quartus Programmer.
2) can see the fpga in Jtag Chain.(the jtagconfig command)
3) can also open juart-teminal from console.
4) can see the target device and Nios-v core through RiscFree IDE Debug Configuration.

Wonder if you can share your design? would like to cross check if the debug component is loaded, I will take the file to consult with the subject matter expert in our team.

  • Balerion's avatar
    Balerion
    Icon for Occasional Contributor rankOccasional Contributor
    1 year ago

    Hi,

    Both of my device are just FPGA. I want to ask that where do you expect the problem to occur in this situation? I mean, does it seem to be at software side or fpga side?

    Thanks,

    Balerion