Altera_ForumHonored Contributor14 years agonios crash,but I don't know what the reason is hi i'm trying to use the nios and some other FPGA logic to achieve composing some inputs to a display, now it running right most of the time,but sometimes when startup or running for a long tim...Show More
Altera_ForumHonored Contributor14 years agosuperloop,I'don't know the details, I just do the part of FPGA logic,soft is done by others
Recent DiscussionsDK-DEV-AGI027-RA: JTAG chain broken after Nios V Hello, FPGA recovery failsWhere is FreeRTOS-Plus-TCP DesignSolvedNIOS V: Systick based timeouts not available when using internal timerSolvedAshling RISC Free IDE fails to download ELF fileNIOS V/m dbg_reset_out signal (Q25.1 Std, MAX10)