Forum Discussion
Altera_Forum
Honored Contributor
16 years agomounting SD Card on uClinux
Hi everyone, I'm trying to implement a fat file system on sd card I followed the instructions for Altera SPI Core on this page http://www.nioswiki.com/operatingsystems/uclinux/mmcsd didn't w...
Altera_Forum
Honored Contributor
13 years ago --- Quote Start --- well, I'm still stuck I thought I'd see something like this on boot, as ashown in nioswiki so I thought of a few possible problems 1. pin assignments 2. IP core not configured as should 3. driver not loaded now I'm down to either it's an IP problem or driver problem so just to make sure again it is Altera's SPI (3 wire interface) IP, right? not someone else's similar IP? and if so could someone show me the right configuration? Thanks again, Asaf --- Quote End --- Hi, I am having the same issue and don't see this message which I am supposedly see when boot up. mmc_spi spi2.0: assuming spi bus stays unshared!
mmc_spi spi2.0: assuming 3.2-3.4 v slot power
mmc_spi spi2.0: sd/mmc host mmc0, no dma, no wp, no poweroff
I follow exactly the recommended setting, but still don't see the message at the bootup Device Drivers ---> [*] SPI support ---> [*] Altera SPI Controller Device Drivers ---> [*] MMC/SD card support ---> [*] MMC/SD over SPI File systems ---> [*] Ext3 journalling file system support File systems ---> DOS/FAT/NT Filesystems ---> [*] VFAT (Windows-95) fs support File systems ---> -*- Native language support ---> [*] Codepage 437 (United States, Canada) File systems ---> -*- Native language support ---> [*] NLS ISO 8859-1 (Latin 1; Western European Languages) On the hdl side in quartus, the pin out as follow input wire SD_DAT, // sd.MISO output wire SD_CMD, // .MOSI output wire SD_CLK, // .SCLK output wire SD_DAT3, // .SS_n .... my_NIOS_mmc_spi mmc_spi ( .clk (mypll_c2_clk), // clk.clk .reset_n (~rst_controller_002_reset_out_reset), // reset.reset_n .data_from_cpu (mmc_spi_spi_control_port_translator_avalon_anti_slave_0_writedata), // spi_control_port.writedata .data_to_cpu (mmc_spi_spi_control_port_translator_avalon_anti_slave_0_readdata), // .readdata .mem_addr (mmc_spi_spi_control_port_translator_avalon_anti_slave_0_address), // .address .read_n (~mmc_spi_spi_control_port_translator_avalon_anti_slave_0_read), // .read_n .spi_select (mmc_spi_spi_control_port_translator_avalon_anti_slave_0_chipselect), // .chipselect .write_n (~mmc_spi_spi_control_port_translator_avalon_anti_slave_0_write), // .write_n .irq (irq_synchronizer_005_receiver_irq), // irq.irq .MISO_to_the_mmc_spi (SD_DAT), // external.export .MOSI_from_the_mmc_spi (SD_CMD), // .export .SCLK_from_the_mmc_spi (SD_CLK), // .export .SS_n_from_the_mmc_spi (SD_DAT3) // .export ); Please help! I greatly appreciated if anyone can point me to the right direction??