Honored ContributorIf a PIO is configured to generate interrupts when a "Level" is detected, how should I handle this in my interrupt service routine? I see the example for edge detected inputs in "count binary", but I am not sure what to do for level detected inputs. For a level detected enabled input, does the interrupt remain active the entire time the input is high?
Honored Contributorsmfelsher,
By defining the interrupt as level sensitive, you are stating that the following behavior is what you want: irq = |(irq_mask & pio_data) This means that if any of the bits in pio_data and the corresponding bit in irq_mask are high, the irq will be generated. If you're looking for something that detects events on each and every bit, I think you'd be happier with edge_capture. The edge_capture register will also hold event values until it is cleared (by writing to it). I hope this helps. Best Regards, slacker P.S.: You could use your IRQ_MASK settings to define different sorts of interrupt events. It all depends upon what sort of hardware you're trying to interface with... P.S.: Even if you're not an HDL expert, looking at what happens in the verilog or VHDL that's generated with any of the various PIOs is a useful exercise to understand what the hardware is doing.Honored ContributorWith the respect to edge cpature inputs, it's clear how the IRQ is handled and cleared. But, when a PIO input is configured to generate an IRQ on a LEVEL, when/how does the IRQ assertion clear? For example, assume a PIO is configured to generate an IRQ when a level is detected. In software, the PIO interrupt handler simply reads the data register, stores it into a variable (i.e. pio_in_data), and exits. The "main" body of the program simply runs a loop printing the contents of pio_in_data when new data arrives. With this program running on a Nios dev. board with the PIO configured for the push-buttons, what if the user were to press and hold one of the buttons. The button input would remain at a "level" for a long period. The IRQ would assert, my interrupt handler would execute and exit. Is the IRQ still asserted? Would the program re-enter my interrupt handler since the input was still detected at a high "level"?
I agree that the edge capture would be the better solution for my example, but I would like to better understand the usefulness of a level detected configuration. I guess I'll have to try programming my example situation. Thanks for your time.
