Forum Discussion

Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
20 years ago

Initialization of on chip memories

Hi all,

Take a "fast" example, and add an additional on-chip memory, let's call it "common_ram".

Then, from the Nios II IDE, create a helloworld project, and add a C variable definition like the following one:

<div class='quotetop'>QUOTE </div>

--- Quote Start ---

int foobar __attribute__ ((section (".common_ram"))) = 57;[/b]

--- Quote End ---

Then, compile the project and debug it. the "foobar" variable has value 0 and not 57!

is that related to the fact that crt0.S in altera_nios2 do not initialize the onchip memories?

bye

Paolo

2 Replies

  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    20 years ago

    Paolo,

    after compiling your software, a &#39;common_ram.hex&#39; file is being created in your FPGA directory. You have to run SOPC builder, where you had defined the on-chip memory. Now a &#39;common_ram.vhd&#39; file is present, which contains your initializing data. After compiling your FPGA in quartus, your memory will be initialized.

    This is the way it works with on-chip ROM. I hope this works with RAM too.

    Mike
  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    20 years ago

    Actually he need-not re-generate in SOPC Builder. The common_ram HDL file is already set to initialize using the .hex file the IDE may (or may not) produce. You should verify that such a .hex file is there, and has some bytes in it that look like initialization data. Then, re-compile in Quartus. This will initialize the on-chip RAM with the contents of the .hex file and include that with the FPGA&#39;s programming file.