Forum Discussion
Altera_Forum
Honored Contributor
21 years agoPaolo,
after compiling your software, a 'common_ram.hex' file is being created in your FPGA directory. You have to run SOPC builder, where you had defined the on-chip memory. Now a 'common_ram.vhd' file is present, which contains your initializing data. After compiling your FPGA in quartus, your memory will be initialized. This is the way it works with on-chip ROM. I hope this works with RAM too. Mike