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Altera_Forum's avatar
Altera_Forum
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12 years ago

How would one put the FPGA HW + Nios II SW image together on the following memories

When it comes to external memories to store configuration data, we have the following options: 1. EPCS. 2. EPCQ. 3. CFI Flash. 4. Quad SPI. 5. NAND Flash. If I have a design containin...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
12 years ago

For EPCS, you would use the EPCS Serial Flash Controller Core IP block and use a JIC programming file.

For the parallel and SPI flash, I believe you are looking at multiple images needed.