Contributor
New ContributorHello,
Terasic has released, A Nios V processor-based design example demonstrating how to sequentially display bitmap image files from a Micro SD card on an HDMI monitor on github. This design includes SDRAM controller. Here the example design path is (github.com/terasic/Atum-A3-Nano/tree/rel/25.1/picture_viewer_1080p) This example design is targeted for Terasic Atum Nios V starter kit.
Please refer this design and modify as per your design requirement utilizing Nios V and SDRAM controller.
Please let me know if you have any further questions.
Thanks
Contributorgot it. thank you for the support, i am using the example for further evaluation.
Occasional ContributorTerasic told me that the DE23-Lite board uses the same FPGA - SDRAM combination and there is an example there. I used it as a starting point for my Atum A3 board.
Now if only they would show us how to use the ethernet port!
New ContributorHello,
Ethernet example design for DE23-lite board is not yet released to public. Tentative plan is to get this example design by then end of Q4'2025. I will let you know once the example design is available. Till then stay tuned!.
Thanks
