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Altera_Forum's avatar
Altera_Forum
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19 years ago

how to slow down communication for LCD

Dear all,

i've hacked the driver of 16x2 to get 20x4 LCD display. It works, but the problem is, that I need to connect the display via quite long flat cable, which is of course not terminated, so it creates big reflections and the display with the cable attached doesn't work at all.

So I was just wondering whether there is a possibility how to slow down the IOWR instructions in order to make the communication slower. As far as I understood the IORD and IOWR is a macro mapped to ldwio/stwio instructions, but I didn't find any practical 'howto' to slow it down.

I've tested to change the parameters of the sopc component stored in class.ptf of the component to something like:

Read_Wait_States = "1250ns";

Write_Wait_States = "1250ns";

Setup_Time = "1250ns";

Hold_Time = "1250ns";

Then i've regenerated vhdl code in sopc builder, reflashed fpga, recompiled nios C software, loaded,.... it didn't change anything.

Any comments on the subject are appreciated

david

5 Replies

  • Altera_Forum's avatar
    Altera_Forum
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    19 years ago

    David,

    Maybe problem is not in duration bus time but in risng/falling edges... Perhaps edges are too strong and long line reflections occurs. Perhaps helps change some parameters for outputs pin in Quartus...
  • Altera_Forum's avatar
    Altera_Forum
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    19 years ago

    Hmm, I didn&#39;t find any option in quartus how to do it. The only option would be to put the resistances in a series with the data lines. But that&#39;s not really what i&#39;d like to do. I could also avoid the problem by slowing down the communication.. Apparently my knowledge is for the moment not sufficient to finish this task http://forum.niosforum.com/work2/style_emoticons/<#EMO_DIR#>/smile.gif

  • Altera_Forum's avatar
    Altera_Forum
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    19 years ago

    What about Slow Slew Rate option for LCD output signals interface? Did you try it?

  • Altera_Forum's avatar
    Altera_Forum
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    19 years ago

    open the assignment editor

    select the lcd signals

    add a current strength for each pin .... this could help

    Michael
  • Altera_Forum's avatar
    Altera_Forum
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    19 years ago

    On Cyclone II chips (probably Cyclone too) you can use driver strength to reduce reflections on the cable. Set all signals to 4mA (for write enable 8mA may be a better option).

    If you are using a different chip, check if supports any of the following parameters:

    - current (driver) strength

    - slow slew rate

    - series termination

    For a list of Quartus Logic Options search the Quartus help for "Logic Options (list of)".

    IzI