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Altera_Forum's avatar
Altera_Forum
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15 years ago

How to get SOPC builder to recognize a SRAM controller

Hi,

I have a custom SRAM controller in a SOPC system. Nios can access the external SRAM through it with no problem. My question is: how could I make it available as an option for setting the reset vector and exception vector for the Nios II processor in SOPC builder?

Currently there are two options for setting those vectors: epcs_flash_controller and onchip_ram. If I add the SRAM controller provided by Altera (IDT71V416) to the system, the SOPC builder will recognize it as the third option for those vectors. Is there any settings I should set to make my custom SRAM controller recognized as an option?

Thanks a lot!

Hua

4 Replies

  • Altera_Forum's avatar
    Altera_Forum
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    15 years ago

    --- Quote Start ---

    In your component tcl file, you need to set the isMemoryDevice option to "true". Look at this post http://www.alteraforum.com/forum/showthread.php?t=24306

    --- Quote End ---

    Hi Ironmoose,

    Thank you for your advice. But this feature is depricated now in QII 9.1 SP2. I did give it a try anyway and the SOPC builder did recognize the sram controller as one of the option for reset vector and exception vector, but it breaks the NIOS in a way that I can't even run a hello world program. The functional simulation also failed at one of the assertions in the cpu testbench.

    Since this is depricated, is there a formal way of setting a IP as a memory device? A link to an Altera documentation would be much appreciated.

    Thanks,

    Hua
  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    15 years ago

    You could try first to use another RAM (such as on-chip) for exception and application, and run a memory test application from there.

    Then with signaltap, you can have a look at what is happening in your controller when the CPU is trying to access it.

    AFAIK there isn't any other way of declaring a component as memory.