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Altera_Forum's avatar
Altera_Forum
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19 years ago

Help! Error occurs when I use PLL in NiosII

The error as follow:

Error: Clock input port inclk[0] of PLL "niosII:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|pll" must be driven by a non-inverted input clock pin

But I didn't invert the clock before the PLL input clock pin.

How can I slove the problem? Will anyone help me?

Thanks in advance!

1 Reply

  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    19 years ago

    I believe you have to use a dedicated input clock pin to drive a PLL. The message isn't referring to what you've done, internally (logic-wise), but that you're trying to drive a PLL with an incorrect incoming pin.

    - slacker