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Honored Contributor
Honored ContributorHelp! Error occurs when I use PLL in NiosII
The error as follow: Error: Clock input port inclk[0] of PLL "niosII:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|pll" must be driven by a non-inverted input clock pin But I ...
Altera_ForumHonored Contributor
Honored ContributorI believe you have to use a dedicated input clock pin to drive a PLL. The message isn't referring to what you've done, internally (logic-wise), but that you're trying to drive a PLL with an incorrect incoming pin.
- slacker
