harware development board layout

Ronan

Sorry to say, but you will to create them yourself like the rest of us. I use Protel and create both the schematic and PCB parts myself.

The schematic is easy. Just make sure you know where all the power and programming pins are. Also a few control lines such as chip selects. Don't forget the M0 and M1 lines. The rest you can basically do with what you want, hence very little standard support.

With the footprint you need to make sure that the spacing (between the pads) is correct, that your pins map one-to-one to you schematic (check and check again) (verify against a printout from the layout on Quartus) and that the pads extend the required length past the pins.

Once you have created your parts you can use them again and again.

So don't be lazy. Figure out how to create parts and then figure out which pins go where. I personally hate libraries. They always let you down.

But let us know a bit more of your project. Will you use external memory? Comms ports? etc? Do you expect your design to fit on a double sided PCB or do you have the budget for a multilayered PCB (remember your FPGA is part of the PCB layout !!! If your pins are in difficult to route places your PCB will be more expensive. Place your pins close to their destinations)?

Victor Schutte

http://www.zerksus.com (http://www.zerksus.com)

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originally posted by victors@Jan 24 2006, 10:51 AM

ronan

sorry to say, but you will to create them yourself like the rest of us. i use protel and create both the schematic and pcb parts myself.

the schematic is easy. just make sure you know where all the power and programming pins are. also a few control lines such as chip selects. don't forget the m0 and m1 lines. the rest you can basically do with what you want, hence very little standard support.

with the footprint you need to make sure that the spacing (between the pads) is correct, that your pins map one-to-one to you schematic (check and check again) (verify against a printout from the layout on quartus) and that the pads extend the required length past the pins.

once you have created your parts you can use them again and again.

so don't be lazy. figure out how to create parts and then figure out which pins go where. i personally hate libraries. they always let you down.

but let us know a bit more of your project. will you use external memory? comms ports? etc? do you expect your design to fit on a double sided pcb or do you have the budget for a multilayered pcb (remember your fpga is part of the pcb layout !!! if your pins are in difficult to route places your pcb will be more expensive. place your pins close to their destinations)?

victor schutte

http://www.zerksus.com (http://www.zerksus.com)

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I use Protel DXP, and it includes a full set of Altera libraries; sch symbols, footprints and SI models. Are you sure you don&#39;t have the libraries already?

hi

thanks for you replies.

i knew than i should do the schematic myself, the problem was for footprint, it can be a very stupid mistake if the card don&#39;t work because we done a wrong footprint!!!! but it&#39;s allright, i done it, and i will chech and chech again...

we will use external, SDRAM, EPCS and FLASH to run a nios program. we will use I2C protocol for communication (from opencore.org IP, we are currently testing it on a 1c12 devellopment board). we would like to use ethernet but the ethernet MAC/PHYS controller take too many pins so i think we will have to forget it. we will use a multilayered PCB (it should be very hard to make a double layed ). we will use the sames components than in Altera&#39;s development boards, for not have to do the nios IP&#39;s.

i hearn than the Flash S29GL064M11TAIR00 can be use in place of the AM29LV065DV-120REI, is it true and does someone tested it?

we should use an MT48LC4M32B2 RAM because it is a 32 bits RAM so we just have to put one in the card (we are trying to make the smallest card as possible)

we use the schematics of development board for helping us to understand exactly how everytings works and to prevent mystake but we have a problem with Altera&#39;s shematics because they use CPLD. so we can&#39;t see exacly what is done. does someone have a shematics where a Cyclone is use for nios II aplication where we can look for the connections between FPGA and Flash, RAM... ? i will be very pleased if someone may send me one at nedelec.ronan@caramail.com

by reading the Altera&#39;s datasheets i think it&#39;s OK but may someone confirm than we can use the Flash programmer on a custom board without CPLD (i have a problem with RY/BY of the Flash, it haven&#39;t any connection with nios and i don&#39;t know where place this pin).

thanks

ronan