Honored ContributorI try to make a first draft with the processor NIOSII.
I get an error that I do not understand when I start my program. "Expected base address of system ID component is undefined" It seems to me to have properly followed the tutorial. I use 10.1 with Quartus license and DE2 KIT. thank you for the reply
Honored ContributorMake sure the FPGA image is the one you are using to create Nios II project. You may have created many revision of the FPGA project and misused one of them.
Honored ContributorThis error shows because of you haven't use SystemID in you system. Please tick mark on both option in the System ID Checks.
Hope fully it works. Thanks, Hardik ShethHonored ContributorYes, either add a system ID component to your system, or check the two system ID checks ignore boxes on the programmer.
Previous versions of the IDE just ignored the system ID checks if it wasn't present instead of putting an error message. I don't know why they changed that, especially when the error message is so cryptic.Honored ContributorOK !
I have checks "ignore box" ... And i have a new pb I don't understand why it is so difficult to configure the tool development. I am a teacher, Altera gave me a full license for Nios. What going on? Look at the file and thank you for your helpHonored ContributorAre you using Qsys or SOPC builder?
I have faced same type of error while using Qys because of I have done wrong connection between JTAG UART and CPU in Qsys.Honored ContributorI'm using SPOC, with full license, i have no problem with application VHDL in Quartus and my DE2.
Thanks for helpHonored ContributorDo you have more information in the error log or in the console about why the download failed?
Be sure to use the correct .sof file too. If you don't have all the licenses properly installed, Quartus will genetare a file that ends with "_time_limited.sof" instead of the usual one. Once you install all the licenses check that Quartus generated a traditionnal .sof file and that this is the one you use in the Quartus programmer.Honored ContributorAll is correct, i have a full license. Nios processor is in the FPGA in my DE2 but i can't download my program.
Honored ContributorBonjour
I have had that problem, This is what I do : 1) load your image (*.sof) with The programmer I start the programmer from Quartus , but it should not matter where you start it from. 2) Run Configuration => NIOS II hardware , go to the Target connection Tab and do Refresh until the connection appear. Do refresh anyway. Then RUN. I also had problem running modelsim from ECLIPSE (run CFG => Modelsim). It would not start my Modelsim because of some PERL errors. I did upgrade to 10.1sp1 and the problem is now gone. Hope it helps BenoitHonored ContributorI suggest you click on the "Open Error Log" to have a closer look on what is causing this error message. Generally, this error message can be due to several causes which might include both SOPC hardware as well as Nios II software. Try to narrow down the issue by starting to debug on software side. Benoit's suggestion could be helpful in this case. Open the "Run Configurations" and check the "Target Connection". If everything is okay, then I would say problem caused by SOPC hardware. Perhaps, you might tell us more detailed on your SOPC system for instance, what are the components that make up your SOPC system.
Hope this is useful. Regards, Caridee
