EPCS64N burn configuration problem

I am running with Quartus6.1 and Nios2 IDE6.1 with Nios2 StratixII Rohs board.

When I tried to burn FPGA configuration into Epcs64N with Nios2 IDE Flash Programmer, it said it can not find Epcs layout information: no Epcs-FF section. I read the old notes on this forum and Altera website and tried the solution with the override.txt file. Then the Flash Programmer pass through the verify, erase steps but when it tried to program the Epcs64N, it stops and shows the information below.

Altera claims they have solved the No Lead problem on Epcs64N but they don't.

Anybody has the same condition as me? I have been struggled with this for several days.

Thanks,

# !/bin/sh# # This file was automatically generated by the Nios II IDE Flash Programmer.# # It will be overwritten when the flash programmer options change.#

cd C:/altera/61/nios2eds/examples/verilog/niosII_stratixII_2s60_rohs/standard/so

ftware/hello_led_0/Debug

# Creating .flash file for the FPGA configuration

"$SOPC_KIT_NIOS2/bin/sof2flash" --epcs --input="$SOPC_KIT_NIOS2/examples/verilog

/niosII_stratixII_2s60_rohs/standard/standard.sof" --output="standard.flash"

Info: *******************************************************************

Info: Running Quartus II Convert_programming_file

Info: Command: quartus_cpf --no_banner --convert --device=EPCS64 --option=standa

rd.opt C:/altera/61/nios2eds/examples/verilog/niosII_stratixII_2s60_rohs/standar

d/standard.sof standard.pof

Info: Quartus II Convert_programming_file was successful. 0 errors, 0 warnings

Info: Allocated 120 megabytes of memory during processing

Info: Processing ended: Thu Dec 07 09:27:15 2006

Info: Elapsed time: 00:00:08

Info: *******************************************************************

Info: Running Quartus II Convert_programming_file

Info: Command: quartus_cpf --no_banner --convert standard.pof standard.rpd

Info: Quartus II Convert_programming_file was successful. 0 errors, 0 warnings

Info: Allocated 50 megabytes of memory during processing

Info: Processing ended: Thu Dec 07 09:27:20 2006

Info: Elapsed time: 00:00:04

# Programming flash with the FPGA configuration

"$SOPC_KIT_NIOS2/bin/nios2-flash-programmer" --epcs --base=0x01210800 --cable='U

SB-Blaster [USB-0]' --sidp=0x012110D8 --id=1872630027 --timestamp=1165448106 "s

tandard.flash"

Using cable "USB-Blaster [USB-0]", device 1, instance 0x00

Resetting and pausing target processor: OK

Reading System ID at address 0x012110D8: verified

: Checksumming existing contents

00000000 : Verifying existing contents

00010000 : Verifying existing contents

00020000 : Verifying existing contents

00030000 : Verifying existing contents

00040000 : Verifying existing contents

00050000 : Verifying existing contents

00060000 : Verifying existing contents

00070000 : Verifying existing contents

00080000 : Verifying existing contents

00090000 : Verifying existing contents

000A0000 : Verifying existing contents

000B0000 : Verifying existing contents

00000000 : Reading existing contents

00010000 : Reading existing contents

00020000 : Reading existing contents

00030000 : Reading existing contents

00040000 : Reading existing contents

00050000 : Reading existing contents

00060000 : Reading existing contents

00070000 : Reading existing contents

00080000 : Reading existing contents

00090000 : Reading existing contents

000A0000 : Reading existing contents

000B0000 : Reading existing contents

Checksummed/read 768kB in 18.5s

00000000 ( 0%): Erasing

00010000 ( 8%): Erasing

00020000 (16%): Erasing

00030000 (25%): Erasing

00040000 (33%): Erasing

00050000 (41%): Erasing

00060000 (50%): Erasing

00070000 (58%): Erasing

00080000 (66%): Erasing

00090000 (75%): Erasing

000A0000 (83%): Erasing

000B0000 (91%): Erasing

Erased 768kB in 9.9s (77.5kB/s)

00000000 ( 0%): Programming

Program failed

Leaving target processor paused