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Altera_Forum
Honored Contributor
Honored ContributorDisabling other processes on nios
Hi, With some help from this forum, I've managed to get my project working well. The fpga reads samples from an ADC and enables a flag when the buffer is full. The nios2 polls the edge capture ...
Altera_ForumHonored Contributor
Honored ContributorHow big is your buffer? If the CPU is slow sometimes to react to the edge, you could generate it when your buffer is almost full, so that you have a bit of margin.
What happens to your buffer is a new ADC value comes just while the CPU is reading the data? Is this case handled by your hardware and software?
