Forum Discussion
7 Replies
- JoshuaT_Altera
New Contributor
Hi @aiedb ,
I'm Joshua, and I will try to help you with this. I suppose you may have seen this link for I2C RSU:
Intel® MAX® 10 FPGA – I2C Remote System Update Design Example
There is a "User Guide" and perhaps the Theory of Operation chapter with specifics on I2C may contain what you're looking for.
Hope this helps.
Regards,
Joshua.
- aiedb
Occasional Contributor
hii Joshua thanks alot for help
i found the user guide , and will start if i will have more questions i will ask . thanks a lot
- aiedb
Occasional Contributor
hii Joshua , i have another question
i was practicing also rsu using nios and uart example , i have build i qsys system of my own based on the rsu_example that i found in the design store
i am practicing on neek kit that have max10d50 which support rsu , i configured the on chip flash ip to dual compressed mode
and also under assignments ->device->device and pin options ->configuration-> i chose dual compressed image the same configuration that i choose in the ip flash core
and in the nios reset vector i choose the generic quad spi controller and on the exception victor i choose on chip ram as same as the example also
but when i compile the design i get an error which doesn't make sense to me i attached a pictures of my configuration and the error that i get , how can i resolve this error i be very glad for help
- JoshuaT_Altera
New Contributor
Hi@aiedb ,
Please open a new thread for this query as it's different from the original post.
Regards,
Joshua.
- NurAiman_M_Intel
Super Contributor
I’m glad that your question has been addressed, I now transition this thread to community support. If you have a new question, Please login to ‘ https://supporttickets.intel.com’, view details of the desire request, and post a feed/response within the next 15 days to allow me to continue to support you. After 15 days, this thread will be transitioned to community support. The community users will be able to help you on your follow-up questions.