Hi,
Did the previous suggestion which is to connect the debug_reset_request to processor reset port solved the "downloading ELF process failed" error?
Regarding the debugger cannot connect issue, you also can try to remove the SYSID IP in Platform Designer, then Re-Add it again, then recompile everything and re-try. By the way, is the design from an example design downloaded somewhere?
We sent you an email. Hope you can reply to that as we want to help figuring the reason you cannot reply to the below thread.
https://community.intel.com/t5/FPGA-SoC-And-CPLD-Boards-And/Cyclone-10-GX-dev-kit-which-signal-can-I-use-to-reset-a-NIOS/m-p/1539825#M26240
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