DE2 JTAG_UART terminal_PC communication problem : pausing target proccessor

I have do the next tests:

1- nios2eds-example-verilog-standard-2c35 fpga-hello_world template WITHOUT sysid: id error

2- same tutorial other templates: board_diagnostic template:Actual system ID not found on target at base address

3- other tutorial: hardware_development/count_binary: NO error

the las tutorial has different hardware system, this tutorial you can do from scratch.

I dont know a new strategy for debug hardware/software nios examples

¿Some ideas?

Thanks