Altera_Forum
Honored Contributor
13 years agoDE0 with uClinux
Hi,
cant configure device.expected jtag ip code 0x020f3000 for device, but found jtag id code is 0x020f2000.How resolve this problem. Kindly any help?Hi,
cant configure device.expected jtag ip code 0x020f3000 for device, but found jtag id code is 0x020f2000.How resolve this problem. Kindly any help?Thanks you sir, there is a pin assignments problem,now i rectified, but it showed another error
Using cable USB-Blaster [7-1] , device, instance 0x00 pausing target processor ok Initializing CPU cache (if present) ok Downloaded 1350kb in 267s(505kb/s) verified 000000(0%) verify failed between add 0xD00000 & 0xD02AA5 leaving target processor paused. Where is the mistake? Thanks , alex.This is probably something wrong with the SDRAM interface. Either bad pin assignments or bad timing.
If you FPGA is big enough you could design a system with some on-chip RAM and then run a memory test application from there to test the SDRAM. For that you will need to create a new BSP that uses the on-chip RAM for all sections (text, bss, data), compile with "optimize for space" and the small C library, and select the memory test template when you create your application.