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Altera_Forum's avatar
Altera_Forum
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15 years ago

DDR2 SDRAM max buffer lenght

Hi, I'm a beginner with Nios programming and I have following issue.

I'm using a DDR2 SDRAM Controller in my SOPC System and I got the description: 333,333MHz, 128MB, 32 bits wide, Descrete Device, CAS 3.0, 1 Chip Select

There are lots of other components in my system using the DDR2 memory and I'd like to know:

what is the max amount of memory I can allocate for a buffer in my Nios software?

I don't quite know how to read the memory map file my Nios has generated in it's build. (A DMA will be using that buffer as a circular buffer to stream data from a peripheral to the PC via Ethernet.)

3 Replies

  • Altera_Forum's avatar
    Altera_Forum
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    No one else can know - since it depends on exactly what else you have loaded.

    You probably also want to ensure the buffer is cache line aligned.

    If you are allocating in in you C something like:

    umsigned char dma_buffer[BUFfER_SIZE] __attribute__((aligned(32)));

    will ensure the buffer ends don't cross cache line boundaries.
  • Altera_Forum's avatar
    Altera_Forum
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    So how do I get an overview of how the memory is used?

    This is how I declare my buffer:

    # define BUFFER_SIZE 750# define SSS_TX_BUF_SIZE 1500
    ...
    volatile INT16U * buffer;       // buffer in the DDR2 SDRAM for DMA-Controller to write to
        
        /* Allocate memory for the circular sample buffer*/
        if((buffer = alt_uncached_malloc(BUFFER_SIZE * sizeof (INT16U))) == NULL)
        {
            printf("Can't allocate memory!");
        }  
    ...
    send(conn.fd, (INT8U*)buffer, SSS_TX_BUF_SIZE, 0);  // send buffer content to PC
    ...
    
    I could also declare it like: INT16U buffer[BUFFER_SIZE]; I think I was having trouble with presice buffering so I just tried the volatile and alt_uncashed_malloc()

    Is that advisable?
  • Altera_Forum's avatar
    Altera_Forum
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    If you are using the altera functions, then alt_uncached alloc() will do something like the required action.

    I suspect it might not ensure that the buffer start/end do not share a cache line with any other data, nor that the cache doesn't contain anything for the returned address range.