Configure NIOS firmware burning interface

@JitLoonL_Altera

Thank you for you patient reply!

I still have 2 more questions about JTAG:

according to your explanation above, in FPGA, JTAG ports are automatically connected to FPGA hardware pins. what pins of FPGA are connected built-in JTAG ports?

The most detailed datasheet I can find is at: https://www.intel.com/content/www/us/en/docs/programmable/683251/current/document-revision-history-for-the-device.html

Do you have more detailed datasheet which tells me what FPGA pins are used for JTAG?