Forum Discussion
ZhiqiangLiang
Occasional Contributor
Occasional ContributorConfigure NIOS firmware burning interface
Hi, I would like to run NIOS II in FPGA. I am now use Cyclone 10 LP 10CL120. I have a few questions: 1) how to enable/configure UART burning interface in Quartus Platform Designer? 2) If I don't...
ZhiqiangLiangOccasional Contributor
Occasional ContributorThank you for you patient reply!
I still have 2 more questions about JTAG:
according to your explanation above, in FPGA, JTAG ports are automatically connected to FPGA hardware pins. what pins of FPGA are connected built-in JTAG ports?
The most detailed datasheet I can find is at: https://www.intel.com/content/www/us/en/docs/programmable/683251/current/document-revision-history-for-the-device.html
Do you have more detailed datasheet which tells me what FPGA pins are used for JTAG?
SueC_AlteraContributor
- ZhiqiangLiang
Thank you! Your link helps.
