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AKhed's avatar
AKhed
Icon for New Contributor rankNew Contributor
8 years ago

Clock signal jumper connection

Hello,

I am designing Main board using Altera FPGA. In circuit I need external differential clock. On main board I have introduce one clock generator circuit also have provision to take clock from external daughter board. Clock frequency range is 10-200MHz.

There are two possibilities but at time one source is selected

1)On board clock generation to FPGA

2)From external board to FPGA

In this can I use male berg pin for clock source selection between on board circuit or external board? If I use Berg pin does it affect on clock Signal n any way?

one more option to place clock generation circuit near possible to header and directly shorting trace without any jumper?

Please suggest any other options

4 Replies

  • AnandRaj_S_Intel's avatar
    AnandRaj_S_Intel
    Icon for Regular Contributor rankRegular Contributor
    8 years ago

    Hi,

    1. Why can't you connect both the clock sources to FPGA pin's?
    2. Can we not use clock multiplexers IC?

    Let me know if this has helped resolve the issue you are facing or if you need any further assistance.

    Best Regards,

    Anand Raj Shankar

    (This message was posted on behalf of Intel Corporation)

  • AKhed's avatar
    AKhed
    Icon for New Contributor rankNew Contributor
    8 years ago

    Hello Anand,

    As I need to interface two source on same differential clocks pin for every clock in available on FPGA and at a time one is present. In my application is clock in either from on board clock generator or from external board and choice is for user who interfacing external board. So, I can't connect both clock source to FPGA. I will check with clock multiplexing IC, still it will increase lot of hardware as I have 4 clock input signals.

    Does berg pin harm in this condition? if yes what are the different effect on signal can you explain.

    if I directly merge the signals what are the different effect of same.

    As I have seen lot of board on which berg pin jumper is used for selection clock source but it have smaller frequency range like 5Mhz. one of the reference from microchip is here.

    https://www.microchip.com/webdoc/stk500/stk500.clock.settings.html

  • AnandRaj_S_Intel's avatar
    AnandRaj_S_Intel
    Icon for Regular Contributor rankRegular Contributor
    8 years ago

    Hi,

    Basically, we will try to keep the clock path clean.

    Jumpers may not add noise. But there will be a small stub created while routing, which will effect the signal to small extend, also which will act as antenna and add noise.

    Best Regards,

    Anand Raj Shankar

    (This message was posted on behalf of Intel Corporation)