Altera_Forum
Honored Contributor
19 years agoBooting from EPCS to SDRAM with Q-II 5.1
We have a Cyclone-II FPGA (EP2C35F484C6) with a NIOS system and an EPCS64 Flash, where is the configuration of the FPGA and the programm code. We have the reset address pointing at this EPCS device, and an external SDRAM memory where the boot loader saves the programm to be executed. The problem we have is the FPGA is continually reconfiguring from the EPCS, we don't know exactly why, but we know is related to the SDRAM. If we force the system boots from the EPCS to an Onchip-RAM everything works perfectly!!.
We think the problem may be also related to the Quartus-II 5.1 (it's the version we are using, with SP1 and SP2). Thanks!