Forum Discussion

Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
15 years ago

Base field (mpubase.BASE) not retrieved on MPU Region read operation

According to the Nios II Processor Reference Handbook, region information can be read as follows:

--- Quote Start ---

"Each MPU region read operation consists of the following actions:

- Execute a wrctl instruction to the mpubase register with the mpubase.INDEX and mpubase.D fields set to identify the MPU region.

- Execute a wrctl instruction to the mpuacc register with the mpuacc.RD field set to one and the mpuacc.WR field cleared to zero. This action loads the mpubase and mpuacc register values.

- Execute a rdctl instruction to the mpubase register to read the loaded the mpubase register value.

- Execute a rdctl instruction to the mpuacc register to read the loaded the mpuacc register value.

The MPU region read operation retrieves mpubase.BASE, mpuacc.MASK or mpuacc.LIMIT, mpuacc.C, and mpuacc.PERM values for the MPU region."

--- Quote End ---

However, when running this sequence even immediately after a write region sequence, the mpubase.BASE field obtained at the end is not correct.

Has anyone else experienced the same?

1 Reply

  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    15 years ago

    It seems that the problem was the interdependency between consecutive instructions affecting the MPU registers. I started noting that when running the program step by step everything runs ok, while when running freely the read value from the mpubase was incorrect. I discovered that changing instruction order so that some other instructions are executed between consecutive accesses to the mpu registers corrected the error.

    So, to be on the safe side I added a "flushp" instruction after each write transfer to mpubase or mpuacc in order to flush the instruction pipeline.

    The odd thing is that the same problem was affecting the write region operations provoking erratic behavior.

    The documentation (Nios II Processor Reference Handbook) states that wrctl to mpubase and mpuacc do not flush the pipeline, and so system software is "responsible for flushing the pipeline as needed", but more emphasis on the fact that it is needed between the different transfers necessary to complete a single read region or write region operation would be welcome.