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Manprocoder
New Contributor
New ContributorAXI4 DMA Master Error
Hi expert, I am building SoC system that includes components as follows: + CPU + onchip_memory_2_0 + onchip_memory_2_1 (source address) + onchip_memory_2_2 (destination address) + IP (Active As...
ManprocoderNew Contributor
New ContributorHi @SueC_Altera
Sure.
My design is in the link below.
https://drive.google.com/drive/folders/1vUU7XVqdJSXgnn0ZmVu3jjvk3DmLEOFW?usp=drive_link
SueC_Altera
Contributor
ContributorThanks, Manprocoder. We'll get back to you.
Sue
