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Altera_Forum
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15 years ago

Avalon OpenCores Ethernet MAC - resource usage

Does anyone know the resource utilization of the OpenCores Avalon Ethernet MAC? I am interested in targeting a CycIII that will be pressed for resources and need to know how many LEs, total memory bits, and M9Ks. I'm not looking for the Analysis & Synthesis "resource utilization by entity" but rather the post fit resources. I know this is dependent on the depth of FIFOs, descriptor memory size, etc... etc... but is there a minimum/maximum or an example of somebody's configuration along with the resource list to give me an idea?

I'm ultimately comparing resources to the Altera-provided TSE MAC. The TSE MAC resources are as follows for a "10/100 Small MAC" with 512 x 32-bit TX/RX FIFO depth and a descriptor memory of 2048 bytes.

1. TSE MAC - 2107 Logic Cells, 10 M9Ks

2. TX SGDMA - 1000 Logic Cells, 5 M9Ks

3. RX SGDMA - 815 Logic Cells, 3 M9Ks

4. Descriptor Mem (and arbitrator) - 240 Logic Cells + 2 M9Ks

Thanks for any comparative information available...

2 Replies

  • Altera_Forum's avatar
    Altera_Forum
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    15 years ago

    Project 1 EP2C70 :

    2621 LC & 4 M4K

    Project 2 EP2C35 :

    2564 LC & 4 M4K
  • Altera_Forum's avatar
    Altera_Forum
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    15 years ago

    MSchmitt,

    Thanks for the reply. Is there anything else required to couple to the CPU(i.e.: is everything included in the LC count below to attach as an Avalon slave and to interface as a master to ddr)? Are the DMAs and descriptor memory included all in there? If so it's quite a savings over the TSE core in its smallest implementation.