Forum Discussion
Altera_Forum
Honored Contributor
15 years agoMSchmitt,
Thanks for the reply. Is there anything else required to couple to the CPU(i.e.: is everything included in the LC count below to attach as an Avalon slave and to interface as a master to ddr)? Are the DMAs and descriptor memory included all in there? If so it's quite a savings over the TSE core in its smallest implementation.