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Honored Contributoralt_timestamp() question
Hi!
I am just wondering if my understanding of the alt_timestamp is totally wrong... My oszillator clock is 50MHz which i can see in the sopc builder and which has never changed. I configured a 32bit/1millisec interval timer in the sopc builder (i named it "TIMER_MSEC") for my nios ii and selected it to the timestamp timer in the BSP editor. Here are the settings:# define ALT_MODULE_CLASS_Timer_Msec altera_avalon_timer# define TIMER_MSEC_ALWAYS_RUN 1# define TIMER_MSEC_BASE 0x0# define TIMER_MSEC_COUNTER_SIZE 32# define TIMER_MSEC_FIXED_PERIOD 0# define TIMER_MSEC_FREQ 50000000u# define TIMER_MSEC_IRQ 0# define TIMER_MSEC_IRQ_INTERRUPT_CONTROLLER_ID 0# define TIMER_MSEC_LOAD_VALUE 49999ULL# define TIMER_MSEC_MULT 0.0010# define TIMER_MSEC_NAME "/dev/Timer_Msec"# define TIMER_MSEC_PERIOD 1# define TIMER_MSEC_PERIOD_UNITS "ms"# define TIMER_MSEC_RESET_OUTPUT 0# define TIMER_MSEC_SNAPSHOT 1# define TIMER_MSEC_SPAN 32# define TIMER_MSEC_TICKS_PER_SEC 1000u# define TIMER_MSEC_TIMEOUT_PULSE_OUTPUT 0# define TIMER_MSEC_TYPE "altera_avalon_timer" # define ALT_MAX_FD 4# define ALT_SYS_CLK none# define ALT_TIMESTAMP_CLK TIMER_MSEC At program start i use alt_timestamp_start() once. Afterwards i do multiple read outs of alt_timestamp(). Expected behaviour: I though the value alt_timestamp() should increase every millisec by one. That means i should reach the limits of the 32bit timer after 49 days. Observed behaviour: The value of alt_timestamp() reaches the limits of 32bit after approximately 90 seconds. Do anybody have an explanation why alt_timestamp() is so fast? Is my understanding of the interval timer totally wrong? What perhaps is the best way to implement a 32bit millisec clock in the nios (i would like to have a clock that can be accessed like this in code: t = GetMillisecClock())? Regards FredFlintstone13 Replies
Altera_ForumWell 90 * 50000000 is 0x10c388d00 so what you have generated is a counter clocked by the 50MHz input clock that would generate an interrupt every millisecond.
What you want to do is write a bit of vhld to divide sys_clk by 50, count those pulses, and make the 32bit value available to the bios cpu. When I looked at the altera supplied 'timer' blocks, none of them do that! In fact, IIRC, the timers are based on some 16bit vhdl so also require a significant number of instructions (and avalon accesses) to get a timestamp value. For really fast timestamps, the counter value could be made the result of a custom instruction - so be read in a single clock and without a data delay. The fastest avalon cycle is (probably) 3 clocks + the 2 clock data delay.- Altera_Forum
If your application structure allows it, you could use the 1ms interrupt from the timer to update a counter variable. Then your GetMillisecClock() would simply read that variable.
- Altera_Forum
@dsl:
Hey dsl! Thanks for your fast reply. --- Quote Start --- What you want to do is write a bit of vhld to divide sys_clk by 50, count those pulses, and make the 32bit value available to the bios cpu. When I looked at the altera supplied 'timer' blocks, none of them do that! --- Quote End --- Grrr, and i thought creating a 32bit millisec clock would be a piece of cake and i could do it from sopc builder. I was already thinking about that what you suggested: creating my own 32bit millisec clock via vhld (ok, i don't like vhdl - i prefer the schematic mode). But how would you make the 32bit value available to the bios(?) cpu? Via pio? Or is there a better way? --- Quote Start --- Well 90 * 50000000 is 0x10c388d00 so what you have generated is a counter clocked by the 50MHz input clock that would generate an interrupt every millisecond. --- Quote End --- I would like to understand this quoted phrase, but i cannot figure out where the "90" comes from. Could you explain this to me - perhaps i am having a mental blackout. Thanks for sharing your experience FredFlintstone - Altera_Forum
@Cris:
Hi Cris! Yes, doing the GetMillisecClock() thing via interrupt is a good idea. But i am still astonished, that this alt_timestamp() stuff does not deliver the results that i would expect. Perhaps i only have the wrong mental links to the word "timestamp". Best regards FredFlintstone - Altera_Forum--- Quote Start --- @dsl: I would like to understand this quoted phrase, but i cannot figure out where the "90" comes from. Could you explain this to me - perhaps i am having a mental blackout. --- Quote End --- It's the 90 seconds you mentioned. This means that 50M increments/sec after 90 sec will overflow the 32bit timer counter.
- Altera_Forum
@Cris:
LOL. Ok, that was my mental blackout. I was only checking the nios defines for finding the "90". I should have checked my own text... Ok, now i understand the calculation by dsl: 90sec * 50000000clocks/sec = 4500000000counts = 0x10C388D00 which does not fit into 32bit. Got it. Thanks again FredFlintstone - Altera_Forum
Possibly he easiest way to read the 32bit counter is from a custom instruction!
But you'll probably need a simple avolon pio slave for something - and making it return the counter value is then fairly easy. It is rather surprising that none of the Altera timer blocks contain a scaled 32bit up-counter. - Altera_Forum
@dsl:
--- Quote Start --- It is rather surprising that none of the Altera timer blocks contain a scaled 32bit up-counter. --- Quote End --- Yes, a scaled 32bit up-counter is exactly what i am missing in the sopc builder (is there some Altera wishlist?). Right now i am trying to abuse a performance counter for my GetMillisecClock() purpose. Hope this will work... Best regards FredFlintstone - Altera_Forum
The HAL functions for the 'performance' counters take a lot of clock cycles ...
This may not matter for you, I got out HW chaps to put in 32bit counters for sys_clk itself and 1ms derived from it. (And anther derived from an asynchronous 8MHz network clock they they forgot to synchronise to sys_clk before counting.) - Altera_Forum
@dsl:
My GetMillisecClock() from the performance counter works well. Ok, it may take a lot of clock cycles to do this, but at the moment this isn't crucial. --- Quote Start --- I got out HW chaps to put in 32bit counters for sys_clk itself and 1ms derived from it --- Quote End --- Could you explain this a little bit further to me? I couldn't follow that. Thanks and regards FredFlintstone
