Well 90 * 50000000 is 0x10c388d00 so what you have generated is a counter clocked by the 50MHz input clock that would generate an interrupt every millisecond.
What you want to do is write a bit of vhld to divide sys_clk by 50, count those pulses, and make the 32bit value available to the bios cpu.
When I looked at the altera supplied 'timer' blocks, none of them do that!
In fact, IIRC, the timers are based on some 16bit vhdl so also require a significant number of instructions (and avalon accesses) to get a timestamp value.
For really fast timestamps, the counter value could be made the result of a custom instruction - so be read in a single clock and without a data delay. The fastest avalon cycle is (probably) 3 clocks + the 2 clock data delay.