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Altera_Forum
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21 years ago

about sram and flash

hello all:

i want to build a 32 bits nios2 system with two sram(IS61LV256) and one flash (am29lv160) . Can anybody tell me how to link them with address.

thank you

4 Replies

  • Altera_Forum's avatar
    Altera_Forum
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    It's dynamic alignement, if I understand you right. And in this case SRAM and FLASH connect to A[0].

  • Altera_Forum's avatar
    Altera_Forum
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    If the SRAM is 32bit in your case, in my opinion, the A0 of SRAM should be connected to A2 of the Nios;

    while, if your Flash is 8bit wide, then connect A0 to A0 will be OK. At least, the "avalon bus specification" says this.
  • Altera_Forum's avatar
    Altera_Forum
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    thank you .

    if my Flash is 16bit wide, the A0 of the flash should connect to" A0 OR A1" of the nios?
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    Altera_Forum
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    Table 15 Page 100 of Avalon Bus Specification:

    in case of NIOSII: Master Width is always 32

    native Alignement = Avalon Register Slave

    dynamic Alignement = Avalon Memory Slave

    Alignment | Master Width | Slave Width | A[0] of Slave is connected to Byte Address Bit Number

    native | 32 | 32 | A2

    native | 32 | 16 | A2

    native | 32 | 8 | A2

    dynamic | 32 | 32 | A2

    dynamic | 32 | 16 | A1

    dynamic | 32 | 8 | A0

    so you have to connect A0 of your flash to A1 of nios address bus.