Hi kkaibara,
Thanks for your reply.
I have tried
overriding logical lane 0 channel assignment restrictions. It works only for a duplex reverse swap. My swap is from a simplex point of view (only tx).
Simulating "altera_eth_10g_mac_xaui design example":
On the top level "
tb.sv" I reversed xaui_tx_data in this manner:
xaui_rx_data[3] = xaui_tx_data[0]
xaui_rx_data[2] = xaui_tx_data[1]
xaui_rx_data[1] = xaui_tx_data[2]
xaui_rx_data[0] = xaui_tx_data[3]
When I tried swapping lanes in
xgmii_tx_dc[71:0], I succeeded in overriding the "local fault" generation and I received the start-of-packet on
xgmii_rx_dc[71:0]. The problem is with the last TXD and TXC of each frame.
ie.:
TX before lane reversal:
TXC[7:0]
c0 TXD[63:0]
07 FD FA 88
f5 DC D7 D6
TX after lane reversal:
TXC[7:0] 30
TXD[63:0] 88 FA FD
07 D6 D7 DC
f5 RX:
RXC[7:0]
c8 RXD[63:0]
fe FD FA 88
fe DC D7 D6
Can you understand what generates the 0xFE?
Thanks,
Dror