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Could you post some of your source code? (address decoding for the VHDL/Verilog part, IORD/WR calls for the software part) It would help us finding out what's wrong.
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hey Daixiwien,
i am attaching a test code to show what i have been trying to do
input read;
output [31:0] read_data;
output [31:0]qx,qy
always @ (posedge CLOCK_50) // each 20nsec
begin
qx= 0XAAAA; --------------------> output1 32 bits
qy= 0XBBBB; ------------------> output 32 bits
read_data = qx;
read_data = qy;
end
endmodule
S/w part:
//SCALAR_POINT_INST - user component name //
# define user_comp_read IORD(
scalar_point_inst_base,0)
unsigned short int yy;
//----------------------------------------------------------------
// MAIN PROGRAM
//----------------------------------------------------------------
int main(void)
{
yy = user_comp_read;
printf("\n data is %#x \n",yy);
}
so this basically reads one value.. i know there must be a simple way to get this working its just that i am new to this and having difficulties.
I have only included the read part right now ..
if you could guide me through it would be great.. also some tips on write also would b great..
Honored Contributor
