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Altera_Forum
Honored Contributor
17 years agoHi kevin! Thx for your time!
After reading your reply I really think that I'm missing something here...related to how NIOS addresses registers in a slave component eg RAM. Are u implying that NIOS addresses bytes(8bits that is) instead of a whole word? To make things clearer with my custom IP, you may consider it as an on-chip RAM which consists of 512words and each word has 64bits. Now, if, ccording to your reply, NIOS addresses bytes then what I get as address range maked perfectly sense since 512words of 64bits each is 512x8= total=4096 8-bit words. So... if NIOS addresses bytes of course we need 12bits for the address range! But then the whole thing is messed up in my mind! Certain questions arise: 1) How are these 12bits are physically implemented since I only provide an ADDRESS_PORT of only 9 bits? 2)If we assume the above "magically solved" then does it mean that NIOS needs 8cycles to read a single 64bit RAM word?! In other words does NIOS have to give 8 addresses to the address port to get a word(64bits)?? 3) Is the "byte_enable" signal that exists in the avalon_slave interface related to this?? How are all these issues handled? Any documentation? Thank you for your help in advance!! This thing is starting to get much more interesting and difficult than i imagined!