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Altera_Forum
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16 years ago

Writing to SDR SDRAM through Synposys designware mem controller

hi, When I am writing to sdram through synopsys designware memory controller the address is not being properly latched by the SDRAM. Like, if I give address as 0x0018 it will write to 0x0010(o...
Altera_Forum's avatar
Altera_Forum
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16 years ago

I'm not sure I understand your last sentence. You don't need to put any constraints on the clock to the sdram, but you must be sure that all the constraints on the other signals to the memory are defined relative to the pin output that gives the clock to the sdram.

AFAIK you only need to delay the clock to the SDRAM if the Timequest report tells you that the timing requirements aren't met, and you must adjust the delay until they are.