Forum Discussion

AFrei11's avatar
AFrei11
Icon for New Contributor rankNew Contributor
5 years ago

Why does the Avalon-ST dual-clock FIFO not transmit the data at the output?

I'm quiet new to FPGA programming and I'm trying to implement the Avalon-ST dual-clock FIFO in my application. As you can see in the picture the FIFO accepts Input Data until the FIFO depth of 16 is ...