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TGao's avatar
TGao
Icon for Occasional Contributor rankOccasional Contributor
6 years ago

Why can PLL + LPDDR2 compile success in Quartus 17.1, but fail in 13.1?

Device：5CEBA4U15I7N

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The reference clk of lpddr2​ is connected to the output of pll, the project can compile success in 17.1 but failed in 13.1.

Error: Failed to find PLL reference clock.

1 Reply

  • BoonT_Intel's avatar
    BoonT_Intel
    Icon for Frequent Contributor rankFrequent Contributor
    6 years ago

    Hi sir,

    Probably it is due to an issue for that old version. The 13.1 obsolete quartus version is obsoleted. Please use newer version.