Forum Discussion
TGao
Occasional Contributor
Occasional ContributorWhy can PLL + LPDDR2 compile success in Quartus 17.1, but fail in 13.1?
Device：5CEBA4U15I7N The reference clk of lpddr2 is connected to the output of pll, the project can compile success in 17.1 but failed in 13.1. Error: Failed to find PLL reference clock.
BoonT_Intel
Frequent Contributor
Frequent ContributorHi sir,
Probably it is due to an issue for that old version. The 13.1 obsolete quartus version is obsoleted. Please use newer version.
