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Honored Contributor
Honored Contributorwhere is HDL SubSystem in DSP builder
Hi, I am new to DSP builder and FPGA programming. I was following DSP builder example which was on implementing FIR filter using DSP builder in Simulink and generating VHDL to be implement in m...
Altera_ForumHonored Contributor
Honored ContributorThat document is very old.
http://www.altera.com/literature/hb/dspb/hb_dspb_std.pdf (http://www.altera.com/literature/hb/dspb/hb_dspb_std.pdf) is much more up-to-date. Chapter 9 there seems to describe the same sort of thing but it should actually work.
