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Honored Contributor
Honored Contributorwhere is HDL SubSystem in DSP builder
Hi, I am new to DSP builder and FPGA programming. I was following DSP builder example which was on implementing FIR filter using DSP builder in Simulink and generating VHDL to be implement in m...
Altera_ForumHonored Contributor
Honored ContributorHi dabuk, the document I am using to design my FIR filter is in a hardcopy, I will post the page sometime later but here is the link from DSP builder manual which also has an example which uses HDL SubSystem.... it on page 83...
http://www.europractice.stfc.ac.uk/vendors/ug_dsp_builder.pdf
