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Altera_Forum's avatar
Altera_Forum
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16 years ago

when i tried to import the hdl file to simulink, i got the following error message

Info: Quartus II Analysis & Synthesis was successful. 0 errors, 0 warnings Info: Peak virtual memory: 159 megabytes Info: Processing ended: Sat Apr 25 19:55:03 2009 Info: Elapsed t...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
16 years ago

Hmmm, you shouldn't have to copy those files into that directory. They should be picked up automatically. Certainly I've never needed to do that. On the other hand, if it works...

Have you tried upgrading to DSPB and Quartus 9.0?

One possibility is you have an interaction between different versions of DSPB and Quartus. Do you have more than one version installed? If so make sure that QUARTUS_VERSION and any paths in PATH point to the right versions. Also please delete the DSPBuilder_<mode>_import directory and try regenerating.

If all else fails you could try posting a cut down model that fails along with verilog source code and I can try to replicate.