What is the major difference betweet 3 differnt ways of creating a DCFIFO?

1) Generates a DCFIFO component with a "basic" interface, to be used directly in VHDL/HDL code.

2) Does the the same as 1 and generates a component to be used in BDF.

3) Generated a DCFIFO component with an Avalon-ST interface, to be used as part of a Qsys system.

So, you use

3) when you need a DCFIFO in a Qsys system

2) when you need a DCFIFO for a piece of logic you're creating using BDF. And you should avoid BDF at all if possible.

1) when you need a DCFIFO for a piece of logic you're creating using VHDL/Verilog.