Forum Discussion
Altera_Forum
Honored Contributor
15 years ago --- Quote Start --- no malfunction, you are just using a MegaCore function in your design that requires a license to operate in standard (non-OpenCore Plus) mode --- Quote End --- my architecture contains the following elements:
- nios2processor
- interval timere
- flash memory interface ( cfi )
- jtag uart
- epcs flash controller
- avalon tristate
- on chip memory