ContributorHi
1) Is there option to define which VREF the FPGA use ? (interal FPGA vref or external IO pin )
If yes - where should I define it in the Quartus
2)Do all the banks should get same vref ?
3)How can I make same vref value when I transfer SERDES data from FPGA to other ( each FPGA locate in other board)
Yishay
Regular ContributorHello,
May I know which FPGA are you using?
Thank you.
ContributorHi
DEVICE 1SG10MHN3F74C2LG_U1
FAMILY "Stratix 10"
Regular ContributorHello Yishay,
Hope you are doing well. You can define Vref by using Pin Planner in your Quartus. There is an external VREF pin for every I/O bank, providing one external VREF source for all I/Os in the same bank. You can refer to page 40 from Stratix 10 GPIO User Guide
Additional documents that you can refer to is as below:
1. Intel Stratix 10 Device Datasheet
Thank you.
ContributorHi
Thank you for your answer ,
According to the DS there is option to choose which VREF to use , internal or exteranal
Attached screenshot :
But , I dont find any option choose it in the Pin Planner :
Please advise
Yishay
Regular ContributorHi,
Which version of Quartus are you using?
Thanks
