Forum Discussion
ymiler
Contributor
ContributorVREF
Hi
1) Is there option to define which VREF the FPGA use ? (interal FPGA vref or external IO pin )
If yes - where should I define it in the Quartus
2)Do all the banks should get same ...
AminT_Intel
Regular Contributor
Regular ContributorHello,
May I know which FPGA are you using?
Thank you.
ymilerHi
DEVICE 1SG10MHN3F74C2LG_U1
FAMILY "Stratix 10"
