Forum Discussion
Altera_Forum
Honored Contributor
11 years agoSince I do not have any memory connected to the FPGA, I can not use a framebuffer. Instead I have replaced the CVI with the Test Pattern Generator. This should be similar to the framebuffer since it can deliver data whenever requestet.
Now the image is displayed correctly and the underflow signal stays inactive, as expected. The next thing I have tried was replacing CVI and CVO with CVI II and CVO II. But since those are limited to 4k FIFO depth the problems in the output image start around line 25 instead of 1019. So I went back to CVI but kept using CVO II. Now it looks same as before but after a couple of minutes the image changed from false data in the last 5 lines to false data in the last ~1015 lines.