Forum Discussion
Altera_Forum
Honored Contributor
11 years agoSeems like you should be able to get this to work. So you have the CVI running at 60MHz and the CVO at 100MHz. What clock is the scaler running off of? If the scaler is running at 100MHz I can't see how this would not work with all the buffering you have in the pipeline.
At 1248x801 the active portion of an input frame lasts 1248*768/60e6 = 15.97ms. At 1560x1068 the active portion of an output frame lasts 1560*1024/100e6 = 15.97ms (exactly the same). As long as the scaler can keep up with the CVO's demand for pixels (it should if running at 100MHz) then to me this should be working for you. I don't advocate designing by trial and error, but if you already have the scaler at 100MHz then you might try speeding it up to 150MHz and see what happens. Also, an underflow makes sense if the scaler can't keep up with the CVO, but I definitely don't understand the overflow condition. The backpressure between the VIP cores should prevent that (I think).